JTAG ï¼ˆJOINT EUROPEAN TEST ACTION GROUPï¼‰ was established by the Europe Institution in 1985, in order to research the test of volume circuit .
After cooperating with the North American ,The name was changed into JTAG(JOINT TEST ACTION GROUP).
The IEEE1194.1 testing interface and board scan structure [IEEE1149.1b 1194] were put out in base of JTAG 2.0 testing testing standards in 1990 , it also becomes the standards of ANSIï¼ˆAMERICAN NATIONAL STANDARDS INSTITUTE ï¼‰
JTAG 2.0 Interface Analyser Module
The JTAG 2.0 Interface Analyser module has been specifically designed to work with any ZeroPlus LAP-C logic analyser. The module is supplied free of charge with your logic analyser purchase:
LAP-C(16032) 16-channels, 100MHz, 512Kbit capture buffer
LAP-C(16128) 16-channels, 200MHz, 4Mbit capture buffer
LAP-C(162000) 16 channels, 200MHz, 64Mbit capture buffer
LAP-C(32128) 32-channels, 200MHz, 4Mbit capture buffer
LAP-C(322000) 32-channels, 200MHz, 64Mbit capture buffer
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