Microwire (EEPROM 93C)
Microwire has four signal lines: CLK, CS, DI and DO. The CLK is the Clock signal line, which is used to sample the Rising Edge or Falling Edge; the CS is the Chip Select line, which can be enabled at the High Level; DI is the Command, Address and Data Input line and DO is the Data Output line.
Microwire EEPROM 93C Analyser Module
The Microwire EEPROM 93C Analyser module has been specifically designed to work with any ZeroPlus LAP-C logic analyser. The module is supplied free of charge with your logic analyser purchase:
LAP-C(16032) 16-channels, 100MHz, 512Kbit capture buffer
LAP-C(16128) 16-channels, 200MHz, 4Mbit capture buffer
LAP-C(162000) 16 channels, 200MHz, 64Mbit capture buffer
LAP-C(32128) 32-channels, 200MHz, 4Mbit capture buffer
LAP-C(322000) 32-channels, 200MHz, 64Mbit capture buffer
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